M.K. Stojcev, E.I. Milovanovic, I.Z. Milovanovic, A Procedure for Multiplication of Concatenated Matrices, In: Mathematical and Intelligent Models in System Simulaton (R. Hanus, P. Kool, S. Tzafestas, eds.), J.C. Baltzer AG Scientific Publishing Co., 1991, 111-116
M.P. Bekakos, I.Z. Milovanovic, E.I. Milovanovic, T.I. Tokic, M.K. Stojcev, Hexagonal Systolic Arrays for Matrix Multiplications, In: Highly Parallel Computations: Algorithms and Applications (M.P. Bekakos, ed.), Series: Advances in High Performance Computing, Vol. 5, WITpress, Southampton-Boston, UK, 2001, 175-209.
M. Mitic, M. Stojcev, and Z. Stamenkovic, An Overview of SoC Buses, in Embedded Systems Handbook, Digital Systems and Aplications, V. Oklobdzija (Ed.), chapter 7, CRC Press, Boca Raton, 2008, pp. 7.1- 7.16
E. I. Milovanović, I. Ž. Milovanović, M. K. Stojčev, "A Class of Low Power Linear Systolic Arrays with Reconfigurable Processing Elements", in Supercomputing Research Advances, ed. Yonge Huang ed., Nova Science Publishers, Inc. New York, 2008
Tatjana Nikolic, Mile Stojcev, Goran Djordjevic, Zoran Stamenkovic, “Wrapper Design for CDMA Shared Bus in SoC”, Chapter 1, pp. 1-34, “Horizons in Computer Science Research”, Ed. Thomas S. Clary, Vol. 2, Nova Science Publishers, Inc. New York, 2011, ISBN: 978-1-61761-439-2
M. K. Stojcev, I. Z. Milovanovic, E. I. Milovanovic, M. P. Bekakos, “ Systolic Array with Reconfigurable Processing Elements ”, Chapter 13, pp. 401-439, “Horizons in Computer Science Research”, Ed. Thomas S. Clary, Vol. 2, Nova Science Publishers, Inc. New York, 2011, ISBN: 978-1-61761-439-2
Mile Stojčev, Tatjana Stanković, “Izabrani zadaci iz Mikroprocesorskih sistema”, Elektronski fakultet, Niš, 2003, ISBN 86-80135-78-X
Tatjana Stanković, Saša Ristić, Miloš Krstić, Ivan Andrejić, Mile Stojčev, “Laboratorijski praktikum iz predmeta Mikroprocesorski sistemi”, Elektronski fakultet, Niš, 2004, ISBN 86-80135-82-8
Mile Stojčev, Tatjana Nikolić, “Protočna obrada i skalarni RISC procesori”, Elektronski fakultet, Niš, 2012, ISBN 978-86-6125-056-9
Mile Stojčev, Tatjana Nikolić, “Superskalarni i VLIW procesori”, Elektronski fakultet, Niš, 2012, ISBN 978-86-6125-057-6
Mile Stojčev, Emina Milovanović, Tatjana Nikolić, “Višeprocesorski sistemi na čipu”, Elektronski fakultet, Niš, 2012, ISBN 978-86-6125-071-2
Mile Stojčev, Emina Milovanović, Tatjana Nikolić, “Višeprocesorski sistemi na čipu”, Elektronski fakultet, Niš, 2012, ISBN 978-86-6125-071-2
[01] M. Stojcev, I. Milovanovic, Z. Radonjic, Some shifting methods for matrix multiplication, IEE Proceedings, 1985, Vol. 132, Pt. E, No. 1, pp. 33- 44,
[02] M. Stojcev, I. Milovanovic, The Initiations of pipeline systems, Int. J. Electronics, 1987, Vol. 62, No. 2, pp. 289-294,
[03] E. I. Milovanović, M. K. Stojčev, I. Z.Milovanović, Calculating an Inverse Matrix for Lower Triangular Matrix Using Two-processor System, Int. J. Electronics, 66 (1) (1989), 43-56,
[04] M. K. Stojčev, E. I. Milovanović, I. Z. Milovanović, An algorithm for multiplication of concatenated matrices, Parallel Comput., 13 (1990), 211-223,
[05] I. Z. Milovanović, E. I. Milovanović, M. K. Stojčev, An optimal algorithm for Gaussian elimination of band matrices on an MIMD computer, Parallel Comput., 15 (1990), 133-145,
[06r]. M.Tosic, M.K.Stojcev,Pipelined serial-parallel multiplier with contraflowing data streams, Electronic Letters, Vol.27, No.25, December 1991, pp.2361-2363,
[07] E. I. Milovanović, M. K. Stojčev, I. Z. Milovanović, Two processor system for LU factorization of five-diagonal matrix, Inter. J. Electronics, 70 (1) (1991), 11-22,
[08] E. I. Milovanović, I. Z. Milovanović, M. K. Stojčev, G. S. Jovanović, Fault-tolerant matrix inversion on processor array, Electronics Letters, 23 (13) (1992), 1206-1208,
[09] I. Z. Milovanović, E. I. Milovanović, M. K. Stojčev, Matrix inversion algorithm for linear array processor, Math. Comput. Modelling, 16 (12) (1992), 133-141,
[10].B. Petrović, M. Stojčev, OTA-Based Dual Input Integrator, Inter. J. Electronics, Vol 75, (1993), No 2, pp 345- 356,
[11]. I. Z. Milovanović, M. A. Kovačević, M. K. Stojčev, E. I. Milovanović, A direct method for BBD matrix inversion, Cybern. Syst. Anal., 30 (2) (1994), 200-212 (Translation from Kibern. Syst. Anal., 2(1994), 51-64),
[12] M. K. Stojčev, E. I. Milovanović, I.Z. Milovanović, An optimal scheduling procedure for matrix multiplication on linear array at a processor level, Inter. J. Parallel Progr., 22 (4) (1994), 437-450,
[13r] Z.M. Georgijev, M. Stojcev, VLSI common voting module for fault-tolerant TMR system in industrial system control applications, Int. J. Electronics, 1994, Vol. 76, No. 2, pp. 163-205,
[14]. B.Petrović, M. Stojčev, D Krstić, Propagation delay time measurement through combinational logic circuit using heterodyne technique, Measurement Science and Technology, Vol.6, No 3, Jul 1995, pp 1028-1034,
[15].V. Pavlovic, M. Stojcev, B. Dimitrijevic, Lj. Golubovic, M. Zivkovic, Lj. Stamenkovic, Ultrasonic pulse-phase method applied in ultrasonic fluid flow measurements, IEE Proc. Sci. Meas. Technol., 1996, Vol. 143, No. 5, pp. 327-333,
[16] I.Z. Milovanović, E. I. Milovanović, I. Z. Milentijević, M. K. Stojčev, Designing processor-time optimal systolic arrays for band matix-vector multiplication, Comput. Math. Appl., 32 (2) (1996), 21-31,
[17] I.Z.Milentijević, M.K.Stojčev, D.M.Maksimović, Configurable digit-serial convolver of type F, Microelectronics Journal, Vol. 27, No 6, pp. 559-566, September 1996.,
[18] I. Z. Milentijević, I. Z. Milovanović, E. I. Milovanović, M. K. Stojčev, The design of optimal planar systolic arrays for matrix multiplication, Comput. Math. Appl., 33 (6) (1997), 17-35,
[19] V. Pavlovic, B. Dimitrijevic, M.Stojcev, Lj. Golubovic, M. Zivkovic, Lj. Stamenkovic, Realization of the ultrasonic liquid flowmeter based on the pulse-phase method, Ultrasonics, 1997, Vol. 35, pp. 87-102, IF 0.780
[20]. M. Tosic, M. Stojcev, D. Maksimovic, G. Lj. Djordjevic, The asynchronous counterflow pipeline bit-serial multiplier, Journal of System Architecture, Vol. 44, (1998) pp. 985-1004, IF 0.402
[21]. I. Z. Milentijević, I. Z. Milovanović, E. I. Milovanović, M. B. Tošić, M. K. Stojčev, Two-level pipelined systolic arrays for matrix-vector multiplication, J. Systems Architecture, 44 (5) (1998), 383-388, IF 0.402
[22] M. K. Stojčev, G. L. Djordjević, E. I. Milovanović, I. Z. Milovanović, Data reordering converter: an interface block in a linear chain of processor arrays, Microelectronics Journal, 31 (1) (2000), 23-37, IF 0.565
[23] E. I. Milovanović, M. K. Stojčev, N. M. Novaković, I. Z. Milovanović, T. I. Tokić, Matrix-vector multiplication on fixed-size linear systolic array, Comput. Math. Appl., 40 (2000), 1189-1203, IF 0.498
[24] M.K. Stojcev, G. Lj. Djordjevic, E.I. Milovanovic, I.Z. Milovanovic, Data reordering converter: an interface block in a linear chain of processing arrays, Microelectronics Journal, Vol. 31, No. 1 (2000) pp. 23-37, IF 0.565
[25r]. M.K. Stojcev, G. Lj. Djordjevic, M.D. Krstic, A hardware mid-value select voter architecture, Microelectronics Journal, Vol. 32, No. 2, (2001), pp. 149-162, IF 0.565
[26] M. K. Stojčev, G. Lj. Djordjevic, T. R. Stanković, Implementation of self-checking two-level combinational logic on FPGA and CPLD circuits, Microelectronics Reliability, Vol. 44, Issue 1, Elsevier, January 2004, pp. 173-178, IF 0.724
[27] Krstic M.D., Stojcev M.K., Djordjevic G. Lj., Andrejic I.D., A Mid-Value Select Voter, Microelectronics Reliability, Vol. 45, pp.733-738, 2005, IF 0.724
[28] Djordjevic G.Lj., Stojcev M.K., Stankovic T.R., Approach to partially self-checking combinational circuit design, Microelectronics Journal, Vol. 35, No. 12, pp. 945-952, December 2004, IF 0.565
[29] Goran S. Jovanović and Mile K. Stojčev, Current starved delay element with symmetric load, International Journal of Electronics, Taylor & Francis Publisher, Volume 93, Number 03 / March 2006, pp. 167 - 175, IF 0.213
[30] Goran Jovanović, Darko Mitić, Mile Stojčev, An adaptive pulse-width control loop, International Journal of Electronics, pp. 291 - 311, Vol. 93, No. 5, May 2006, IF 0.213
[31] Mile Stojcev, Goran Jovanovic, Clock aligner based on delay locked loop with double edge synchronization, Microelectronics Reliability, Vol. 48, No. 1, pp. 158–166, January 2008
[32] Tatjana R. Nikolic, Mile K. Stojcev , “CDMA Coded Wrapper-Based System Bus”, Electronics, Vol. 12, No. 1, 1st June 2008, pp. 16-2
[33] T. R. Nikolic, M. K. Stojcev , G. Lj. Djordjevic , “CDMA bus based on-chip interconnect infrastructure”, Microelectronics Reliability, Vol. 49, No. 4, April 2009, pp. 448–459,
[34] E. I. Milovanovic, T. R. Nikolic, M. K. Stojcev ,
[35] M.K. Stojcev, I.Z. Milovanovic, E.I. Milovanovic and T.R. Nikolic, “Address generators for linear systolic array”, Microelectronics Reliability, Vol. 50, No. 2, February 2010, pp. 292–303, available online at: http://dx.doi.org/10.1016/j.microrel.2009.11.005
[36]
[37]
[38] Goran S. Jovanovic , Darko B. Mitic, Mile K. Stojcev and Dragan S. Antic, “Delay Locked Loop Clock Generator in Low Power VLSI IC Design”, Transactions on AUTOMATIC CONTROL and COMPUTER SCIENCE, Vol. 56 (70), No. 4, pp. 131-136, December 2011. http://www.ac.upt.ro/journal/article.php?v=56%2870%29%20&%20vn=4%20&%20n=1
[39] M. Stojcev, Lj. Golubovic, T. Nikolic , “Clocks, Power and Synchronization in Duty-Cycled Wireless Nodes” , Facta Universitatis (Nis), Series: Electronics and Energetics, Vol. 24, No. 2, August 2011, pp. 183-208, http://factaee.elfak.ni.ac.rs/ fu2k112AS/4mile.html
[40] Goran S. Jovanović, Darko B. Mitić, Mile K. Stojčev, Dragan S. Antić, "Phase-Synchronizer Based on gm–C All–Pass Filter Chain", Advances in Electrical and Computer Engineering, Vol. 12, No 1, pp. 39-44, 2012.
http://www.aece.ro/abstractplus.php?year=2012&number=1&article=7
[41] Goran Jovanovic, Mile Stojcev, Tatjana Nikolic, Clock jitter generator with picosecond resolution, International Journal of Electronics, this paper is accepted for publication for 2012
Book review
[42]. Mile Stojcev, book review for, High-performance energy-efficient microprocessor design, V. Oklobdzija ed, Microelectronics Reliability, Vol 48, (2008), 953-954
[43]. Mile Stojcev, book review for, Principle of computer hardware, Alan Clements, Microelectronics Reliability, Vol. 48, (2008), 955-956
[44]. Mile Stojcev, book review for, Clock generators for SoC processors: Circuit and Architectures, Amr Fahim, Microelectronics Reliability, Vol. 48, (2008), 661-662
[45]. Mile Stojcev, book review for, Design of wireless autonomous data logger ICs, Wim Claes, Microelectronics Reliability, Vol. 48, (2008), 659-660
[46]. Mile Stojcev, book review for, Embedded processor-based self test, Dimitris Gizopoulos, Microelectronics Reliability, Vol 48, (2008), 657-658
[47]. Mile Stojcev, book review for, Advances in electronic testing: Challenges and methodologies, Dimitris Gizopoulos ed., Microelectronics Reliability, Vol. 48, (2008), 798-799
[48]. Mile Stojcev, book review for, Introduction to advanced system-on-chip test design and optimization, Erik Larson, Microelectronics Reliability, Vol. 48, (2008), 800-801
[49]. Mile Stojcev, book review for, LabVIEW digital signal processing and digital communications, Cory Clark, Microelectronics Reliability, Vol 48, (2008), 490-491
[50],. Mile Stojcev, book review for, Introduction to instrumentation, sensor, and process control, Microelectronics Reliability, Vol 48, (2008), 494-495
[51]. Mile Stojcev, for Introduction to instrumentation and measurement, Microelectronics Reliability, Vol. 48, (2008), 492-493
[52]. Mile Stojcev, book review for, Domain-specific processors: Systems, architectures, modeling, and simulation, Microelectronics Reliability, Vol. 48, (2008), 329-330
[53]. Mile Stojcev, book review for, Advanced computer architectures, Sajjan Shiva, Microelectronics Reliability, Vol. 48, (2008), 331-332
[54]. Mile Stojcev, book review for, Portable electronics product design and development, Microelectronics Reliability, Vol. 48, (2008), 333-334
[55]. Mile Stojcev, book review for, Verilog digital system design: Register transfer level synthesis, testbench & verification, Zainalabedin Navabi, Microelectronics Reliability, Vol. 48, (2008), 167-168
[56]. Mile Stojcev, book review for, Applied formal verification, Douglas Perry, Microelectronics Reliability, Vol. 48, (2008), 169-170
[57]. Mile Stojcev, book review for, Computer architecture: Fundamentals and principles of computer design, Dumas II Joseph, Microelectronics Reliability, Vol. 48, (2008), 171-172
[58]. Mile Stojcev, book review for, Fast, efficient and predictable memory access: Optimization algorithms for memory architecture aware compilation, Lars Wehmeyer, Microelectronics Reliability, Vol. 47, (2007), 2289-2290
[59]. Mile Stojcev, book review for, Electronic design automation for integrated circuit handbook, Louis Scheffer, ed., Microelectronics Reliability, Vol. 47, (2007), 2287-2288
[60]. Mile Stojcev, book review for, Wireless & cellular telecommunications, William Lee, Microelectronics Reliability, Vol 47, (2007), 2284-2286
[61]. Mile Stojcev, book review for, Taxonomies for the development and verification of digital systems, Brian Bailey, Microelectronics Reliability, Vol. 47, (2007), 2282-2283
[62]. Mile Stojcev, book review for, Embedded systems handbook, Richard Zurawski ed., Microelectronics Reliability, Vol. 47, (2007), 1307-1309
[63]. Mile Stojcev, book review for, Distributed sensor networks, Sitharama Iyengar, Microelectronics Reliability, Vol. 47, (2007), 1306-1307
[64]. Mile Stojcev, book review for, Integrated system level modeling of network-on-chip enabled multi-processors platforms, Tim Kogel, Microelectronics Reliability, Vol. 48, (2008), 1742-1743
[65]. Mile Stojcev, book review for, The industrial information technology handbook, Richard Zurawski ed., Microelectronics Reliability, Vol. 47, (2007), 1153-1154
[66]. Mile Stojcev, book review for, Handbook of sensor networks, Mohamed Ilyas, Microelectronics Reliability, Vol. 47, (2007), 996-997
[67]. Mile Stojcev, book review for, Sequential logic: Analysis and synthesis, Joseph Cavanagh, Microelectronics Reliability, Vol. 48, (2008), 1108-1109
[68], Mile Stojcev, book review for, Arithmetic and logic in computer systems, . Lu Mi , Microelectronics Reliability, Vol. 47, (2007), 157-158
[69]. Mile Stojcev, book review for, Digital measurement techniques, T. S. Rathore, Microelectronics Reliability, Vol. 48, (2008), 1106-1107
[70]. Mile Stojcev, book review for, Integration technologies for industrial automated systems, Richard Zurawski, Microelectronics Reliability, Vol. 48, (2008), 1744-1745
[71]. Mile Stojcev, book review for, Fault injection techniques and tools for embedded systems reliability and evaluation, Alfredo Benso, Microelectronics Reliability, Vol. 46, (2006), 1396-1397
[72]. Mile Stojcev, book review for, Timing, Sachin Sapatnekar, Microelectronics Reliability, Vol. 46, (2006), 1398-1399
[73]. Mile Stojcev, book review for, Dedicated digital processors: methods in hardware/software system design, Microelectronics Reliability, Vol. 46, (2006), 1025-1026
[74. Mile Stojcev, book review for, CMOS circuit design, layout and simulation, John Baker, Microelectronics Reliability, Vol. 46, (2006), 1214-1213
[75]. Mile Stojcev, book review for, Computer architecture and organization, John Hayes, Microelectronics Reliability, Vol. 46, (2006), 196-197
[76]. Mile Stojcev, book review for, System Verilog for design: A guide to using system Verilog for hardware design and modeling, Microelectronics Reliability, Vol. 46, (2006), 198-199
[77]. Mile Stojcev, book review for, Elements of STIL: principles and applications of IEEE Std.1450, Microelectronics Reliability, Vol. 45, (2005), 1951-1952
[78]. Mile Stojcev, book review for, Fundamental of digital logic with Verilog design, Microelectronics Reliability, Vol. 46, (2006), 194-195
[79]. Mile Stojcev, book review for, The in-system configuration handbook, N.G. Jacobson, Microelectronics Reliability, Vol. 45, (2005), 1949-1950
[80]. Mile Stojcev, book review for, Low power electronic design, Christian Pignet, ed., Microelectronics Reliability, Vol. 46, (2006), 653-654
[81]. Mile Stojcev, book review for, Communication networks: Fundamental concepts and key architectures, Alberto Leon-Garcia, Microelectronics Reliability, Vol. 45, (2005), 1273-1274
[82]. Mile Stojcev, book review for, Design of energy-efficient application-specific instruction set processors (ASIPs), Microelectronics Reliability, Vol. 45, (2005), 1270-1271
[83]. Mile Stojcev, book review for, Digital Computer arithmetic datapath design using Verilog HDL, James Sine, Microelectronics Reliability, Vol. 45, (2005), 1272
[84]. Mile Stojcev, book review for, Mile Stojcev, book review for, Operational amplifier speed and accuracy improvement: Analog circuit design with structural methodologies, Vadim Ivanov, Microelectronics Reliability, Vol. 45, (2005), 407-408
[85]. Mile Stojcev, book review for, Introduction to computing systems: From bits and gates to C and beyond, Microelectronics Reliability, Vol. 45, (2005), 405-406
[86]. Mile Stojcev, book review for, Data communication, Barry Lee, Microelectronics Reliability, Vol. 45, (2005), 403-404
[87]. Mile Stojcev, book review for, Mixed-signal layout generation concepts, Microelectronics Reliability, Vol. 45, (2005), 197-198
[88] Mile Stojcev, book review for, Computer organization, Carl Hamacher, Microelectronics Reliability, Vol. 45, (2005), 1019-1020
[89]. Mile Stojcev, book review for, Digital assisted pipeline ADCs: Theory and implementation, Boris Murmann, Microelectronics Reliability, Vol. 45, (2005), 1017-1018
[90]. Mile Stojcev, book review for, Data communication and networking, Behrouz Forouzan, Microelectronics Reliability, Vol. 45, (2005), 1014-1016
[91]. Mile Stojcev, book review for, Testing static random access memories: Defects, fault models and test patterns, Said Hamdiou, Microelectronics Reliability, Vol. 45, (2005), 1012-1013
[92] Mile Stojcev, book review for, Systematic design of analog IP blocks, J. Vandenbusche, Microelectronics Reliability, Vol. 45, (2005), 195-196
[93] CMOS Telecom data converters, Angel Rodriguez-Vazquez, Microelectronics Reliability, Vol. 44, (2004), 2029-2030
[94] Mile Stojcev, book review for, Low-voltage CMOS log companding analog design, Francisco Sera-Graells, Microelectronics Reliability, Vol. 44, (2004), 2033-2034
[95] Mile Stojcev, book review for, Design and control of RF power amplifier, Alireza Shirvani, Microelectronics Reliability, Vol. 44, (2004), 2031-2032
[96] Mile Stojcev, book review for, High performance memory testing: Design principles, fault modeling and self test, dean
[97]. Mile Stojcev, book review for, CTL fot test information of digital ICs, Rohit Kapur, Microelectronics Reliability, Vol. 43, (2003), 1171-1172
[98]. Mile Stojcev, book review for, Networks on chip, Axel Jantsch, Microelectronics Reliability, Vol. 44, (2004), 1203-1204
[99] Mile Stojcev, book review for, Memory architecture exploration for programmable embedded systems, Peter Grun, Microelectronics Reliability, Vol. 44, (2004), 1205-1206
[100] Mile Stojcev, book review for, Reliability of computer systems and networks: Fault tolerance, analysis and design, Martin Shooman, Microelectronics Reliability, Vol. 44, (2004), 1275-1276
[101]. Mile Stojcev, book review for, Digital design and computer architectures, Hassan Farhat, Microelectronics Reliability, Vol. 44, (2004), 1279-1280
[102] Mile Stojcev, book review for, Power distribution networks in high-speed integrated circuits, Andrey Mezhiba, Microelectronics Reliability, Vol. 44, (2004), 1277-1278
[103]. Mile Stojcev, book review for, Oversampled delta-sigma modulators: Analysis applications and novel topologies, Mucahit Kozak, Microelectronics Reliability, Vol. 44, (2004), 1029
[104]. Mile Stojcev, book review for, Analog design for CMOS VLSI systems, Franco Maloberti, ed., Microelectronics Journal, Vol. 34, (2003), 161
[105]. Mile Stojcev, book review for, Power estimation and optimization for VLIW-based embedded systems, Vittorio Zaccaria, Microelectronics Reliability, Vol. 44, (2004), 707-708
[106]. Intellectual property protection in VLSI design: Theory and practice, Gang Qu, Microelectronics Reliability, Vol. 44, (2004), 705-706
[107]. Mile Stojcev, book review for, Power- constrained testing of VLSI circuits, Nikola Nikolici, Microelectronics Reliability, Vol. 44, (2004), 547-548
[108]. Mile Stojcev, book review for, System design with System C, Thorsten Grotker, Microelectronics Reliability, Vol. 43, (2003), 683-684
[109]. Mile Stojcev, book review for, Data structures with C++ using STL, William Ford, Microelectronics Journal, Vol. 34, (2003), 93-94
[110]. Mile Stojcev, book review for, Computer architecture: A quantitative approach, John Hennessy, Microelectronics Journal, Vol. 28. No.5, (1997), 599-600
[111]. Mile Stojcev, book review for, Fault tolerant parallel computation, Paris Christos Kanellakis, Microelectronics Journal, Vol. 29. No.5, (1998), 574-575
[112] Mile Stojcev, book review for, Electronic devices and circuits- Conventional flow version, Michael Hassu, Microelectronics Journal, Vol. 29, (1998), 571
[113] Mile Stojcev, book review for, Arithmetic built-in self test for embedded systems, Janusz Rajski, Microelectronics Journal, Vol. 29. (1999), 182
[114]. Mile Stojcev, book review for, Algorithms sequential and parallel: A unified approach, Microelectronics Journal, Vol. 32. (2001), 383-384
[115] Mile Stojcev, book review for, Memory design techniques for low energy embedded systems, Alberto Macii, Microelectronics Reliability, Vol. 43, (2003), 513
[116]. Mile Stojcev, book review for, A designer’s guide to built-in self test, Charles Stroud, Microelectronics Reliability, Vol. 43, (2003), 513-514
[117] Mile Stojcev, book review for, Semiconductor memories: Technologies, testing and reliability, Ashok K. Sharma, Microelectronics Reliability, Vol. 43, (2003), 515
[118] Mile Stojcev, book review for, Interconnecting and computing over satellite networks, Yongguang ed., Microelectronics Reliability, Vol. 44, (2004), 363-364
[119]. Mile Stojcev, book review for, Introductory VHDL: From simulation to synthesis, Sadhakar Yalamanchily, Microelectronics Journal, vol. 32, 2001, 699-700
[120]. Mile Stojcev, book review for, High performance system design: Circuit and logic, Vojin Oklobdzija, Microelectronics Journal, vol. 31, 2000, 475-477
[121] Mile Stojcev, book review for, System-on-chip: Design and test, Roshit Rajsuman, Microelectronics Journal, vol. 34, 2003, 313-314
[122]. Mile Stojcev, book review for, Design criteria for low distortion in feedback OPAMP circuits, Bjornar Hernes, Microelectronics Reliability, Vol. 44, (2004), 181- 182
[123]. Mile Stojcev, book review for, System on chip design languages, Anne Mignotte, Microelectronics Reliability, Vol. 44, (2004), 179
[124] Mile Stojcev, book review for, Introduction to modern power electronics, A.M. Trzynadlowski, Microelectronics Journal, vol. 31, 2000, 61
[01] M. Jevtic, M. Stojcev, Shading alphanumerical and graphical symbols in TV system, 1985, Electronic Engineering, Vol. 57, No. 12, pp. 31-32, , IF 0.015
[02] M. D. Mihajlović, I.Z. Milovanović, M. K. Stojčev, E. I. Milovanović, Solving tridiagonal system of linear equations in parallel, Pure Math. Appl. Ser., 4 (3) (1993), 391-407.
[03] E. I. Milovanović, M. D. Mihajlović, I. Z. Milovanović, M. K. Stojčev, Solving tri-diagonal linear systems on MIMD computers, Parallel Proc. Letters, 4 (1-2) (1994), 53-64.
[04] G. Lj. Djordjevic, M.K. Stojcev, An interprocessor communication interface for message passing via shared memory modules - design and performances, Computers and Artificial Intelligence, Vol. 14 (1996), No. 1, pp. 1-33.
[05]. E. I. Milovanović, I. Z. Milovanović, M. K. Stojčev, M. D. Mihajlović, An optimal algorithm for Gaussian elimination of band matrices on a MIMD system, Computer Artificial Intelligence, 15 (5) (1996), 467-481.
[06]. I. Z. Milovanović, M. D. Mihajlović, E. I. Milovanović, M. K. Stojčev, Parallel algorithm for inverting tridiagonal matrix on linear processor array, Pure Math. Appl. Ser., 7 (3-4) (1996), 383-409.
[07] G. Lj. Djordjevic, M.K. Stojcev, An interprocessor communication interface for message passing via shared memory modules - design and performance, Computers and Artificial Intelligence, Vol. 14 (1996), No. 1, pp. 1-33.
[08] M. Stojcev, D. Radenkovic, Programmable digital phase shifters, Electronic Engineering, 1997, Vol. 69 , No. 10, pp. 23-34,
[09] M. Stojčev, B. Petrović, D. Radenković, Programable Digital Shifters, Electronic Engineering, 1998, Vol. 70, No. 5, pp. 23-31
[10] M. Stojčev, I.Z. Milentijević, D. Kehagias, R. Drechsler, M. Gusev, Computer Architecture Core of Knowledge for Computer Science Studies, Cyprus Computer Society Journal, Vol. 5., No. 4, March 2003, pp. 39-42.
[11] Tatjana R. Stanković, Mile K. Stojčev, “Implementation of Totally Self-checking Combinational Logic on FPGA and CPLD Circuits Using VHDL Descriptions ”, Cyprus Computer Society Journal, Vol. 5, No. 5, June, 2003, pp. 40-44
[12] Goran Jovanovic, Mile, Stojcev, Tatjana Nikolic, Programmable jitter generator, Int., Reasoning-based Intelligent systems, Vol. 4, No.1/2, pp. 39-45, 2012
[13] Goran Jovanovic, Darko Mitic, Mile Stojcev, Dragan Antic, Delay locked loop clock generator in low power VLSI IC design, Transactions on automatic control and computer science, Vol.56 (70), No. 4, December 2011, pp. 131-136
M. Stojčev, T. Stanković, “Parity error detection in embedded system”, Second International Conference on Informatics and Information Technology, CiiT 2001, Molika, December 20-23, 2001, pp. 293-307
T. R. Stankovic, M. K. Stojcev, G. Lj. Djordjevic, “On VHDL synthesis of self-checking two-level combinational circuits”, Third Triennial International Conference on Applied Automatic Systems, Ohrid, Republic of Macedonia, September 18-20, 2003, pp. 225-230
T. R. Stankovic, M. K. Stojcev, G. Lj. Djordjevic, “Design Of Self-Checking Combinational Circuits”, 6th International Conference on Telecommunications in Modern Satellite, TELSIKS 2003, Niš, Serbia and Montenegro, October 1-3, 2003, pp. 763-768
M. K. Stojcev, G. Lj. Djordjevic, T. R. Stankovic, “VHDL-Based Design of FSM with Concurrent Error Detection Capability”, Proc. 24th International Conference on Microelectronics (MIEL 2004), Vol. 2, Niš, Serbia and Montenegro, May, 2004, pp. 759-762
M. Stojčev, T. Stanković, P. Krtolica, “Lab Practicing in Studying the Assembly Languages and Computer Architecture”, Proceedings of Workshops on Computer Science Education, Niš, Serbia and Montenegro, January 2004, pp. 65-70
G. Lj. Djordjevic, T. R. Stankovic, M. K. Stojcev, “Concurrent Error Detection in FSMs Using Transition Checking Technique”, in Proc. of 7-th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services (TELSIKS 2005) vol. 1, Nis, Serbia and Montenegro, September 2005, pp. 61-64, ISBN: 86-85195-27-6
G. Lj. Djordjevic, T. R. Stankovic, M. K Stojcev, “Approach to Partially Self-Checking Finite State Machine Design”, Proc. 25th International Conference on Microelectronics (MIEL 2006), Belgrade, Serbia and Montenegro, Vol.2, 14-17 May, 2006, pp. 697-700, ISBN: 1-4244-0116-X
T. R. Nikolic, G. Lj. Djordjevic, and M. K. Stojcev, “Low Power Application Specific Processing Element”, XLII International Scientific Conference on Information, Communication and Energy Systems and Technologies, ICEST 2007, Vol. 1, Ohrid, 24-27 June 2007, pp. 135-138, ISBN: 9989-786-06-2
T. R. Nikolic, G. Lj. Djordjevic, and M. K. Stojcev, “Simultaneous Data Transfers over Peripheral Bus Using CDMA Technique”, Proc. 26th International Conference on Microelectronics (MIEL 2008), Niš, Serbia, 11-14 May, 2008, pp. 437-440, ISBN: 978-1-4244-1882-4
T. R. Nikolic, M. K. Stojcev, “CDMA Coded Wrapper-Based SoC Interconnect”, Proc. XLIII International Scientific Conference on Information, Communication and Energy Systems and Technologies (ICEST 2008), Niš, Serbia, 25-27 June, 2008, pp. 399-402, ISBN: 978-86-85195-61-7
M. K. Stojčev, T. R. Nikolić, E. I. Milovanović, I. Ž. Milovanović, “Address Generators Units for Bidirectional Linear Processor Array”, A Preprints Volume from the 6th IFAC Workshop, International Conference DECOM-09, Ohrid, Republic of Macedonia, 26-29 September, 2009, pp. 101-106
M. K. Stojčev, I. Ž. Milovanović, E. I. Milovanović, T. R. Nikolić, “Address Generators for Linear Processor Array”, Proc. of 9-th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services (TELSIKS 2009), Nis, Serbia, 7-9 October 2009, Vol. 1, pp. 302-305, ISBN: 978-1-4244-4383-3
T. R. Nikolic, M. K. Stojcev, “CDMA versus TDMA Transfer over Shared Bus”, XLIV International Scientific Conference on Information, Communication and Energy Systems and Technologies, ICEST 2009, 25-27 June, 2009, Veliko Tarnovo, Bulgaria, Vol. 1, pp. 293-296, ISSN: 978-954-438-795-2
Tatjana Nikolic, Mile Stojcev, Zoran Stamenkovic, “Wrapper Design for a CDMA Bus in SOC”, 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2010), April 14-16, 2010, Vienna, Austria, pp. 243-248, ISBN: 978-1-4244-6611-5
Tatjana Nikolic, Mile Stojcev, “Multiple-Bit Parallel CDMA Data Transfer over Common Bus”, Proc. 27th International Conference on Microelectronics (MIEL 2010), Niš, Serbia, 16-19 May, 2010, pp. 365-368, ISBN 978-1-4244-7198-0
Goran S. Jovanović, Tatjana R. Nikolić and Mile K. Stojčev, “A CDMA and PAM Signaling Interconnect Architecture”, XLV International Scientific Conference on Information, Communication and Energy Systems and Technologies, ICEST 2010, 23-26 June, 2010, Ohrid, Macedonia, Vol. 1, pp. 263-268, ISBN 978-9989-786-57-0
Goran Jovanović, Mile Stojčev, and Tatjana Nikolić, “Programmable Jitter Generator”, XLVI International Scientific Conference on Information, Communication and Energy Systems and Technologies, ICEST 2011, Niš, Serbia, 29 June - 1 July, 2011, pp. 53-58, ISBN 978-86-6125-031-6, http://icestconf.org
G. Jovanović, M. Stojčev, T. Nikolić, Z. Stamenković, “Clock Jitter Generator with Picoseconds Resolution”, Proc. 28th International Conference on Microelectronics (MIEL 2012), Niš, Serbia, 13-16 May, 2012, pp. 361-364, ISBN 978-1-4673-0236-4
I. Ž. Milovanović, M. K. Stojčev, E. I. Milovanović, T. R. Nikolić, “Linear Processor array in DSP”, Proc. 28th International Conference on Microelectronics (MIEL 2012), Niš, Serbia, 13-16 May, 2012, pp. 387-392, ISBN 978-1-4673-0236-4
Tatjana Nikolić, Mile Stojčev, Goran Jovanović, “A Fault-Tolerant Interconnections Using LCDMA Technique”, Proc. 28th International Conference on Microelectronics (MIEL 2012), Niš, Serbia, 13-16 May, 2012, pp. 419-422, ISBN 978-1-4673-0236-4
Nemanja Savić, Mile Stojčev, Tatjana Nikolić, “Fault Tolerant Pseudorandom Number Generator”, Proceedings of Mediterranean Conference on Embedded Computing, MECO 2012, Bar, Montenegro, 19-21 June, 2012, pp. 30-33, ISBN 978-9940-9436-0-8
Tatjana Nikolić, Mile Stojčev, “A Fault-Tolerant Interconnections Using LCDMA and Duplication with Comparison Technique”, XI International Conference on Systems, Automatic Control and Measurements (SAUM 2012), Niš, Serbia, 14-16 November, 2012, pp. 402-405, ISBN 978-86-6125-072-9
Emina Milovanovic, Igor Milovanovic, Mile Stojcev, Tatjana Nikolic, “Hexagonal arrays for fault-tolerant matrix multiplication”, Book of Abstracts, 7th International Conference on Parallel Matrix Algorithms and Applications (PMAA 2012), 28-30 June 2012, Birkbeck University of London, UK, p. 8
Mile Stojcev, Tatjana Nikolic, Emina Milovanovic, Igor Milovanovic, “Communication architecture for interconnecting IP blocks in SoC design using a LCDMA technique”, Book of Abstracts, 7th International Conference on Parallel Matrix Algorithms and Applications (PMAA 2012), 28-30 June 2012, Birkbeck University of London, UK, p. 16
V. Petrović, Z. Stamenković, M. Stojčev, T. Nikolić, and G. Jovanović, “Fault-Tolerant Reconfigurable Low-Power Pseudorandom Number Generator”, IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2013), pp. 279-282, April 8-10, Karlovy Vary, Czech Republic, 2013., ISBN 978-1-4673-6135-4
Goran Jovanović, Darko Mitić, Mile Stojčev and Tatjana Nikolić, “A 900 MHz Self-Tunable Narrowband Low-Noise Amplifier”, XLVIII International Scientific Conference on Information, Communication and Energy Systems and Technologies, ICEST 2013, 26-29 June, 2013, Ohrid, Macedonia, vol. 1, pp. 235-238, ISBN 978-9989-786-90-7, Faculty of Technical Sciences, Bitola
M. K. Stojčev, I. Ž. Milovanović, E. I. Milovanović, T. R. Nikolić, “Implementation of Parallel LFSR for BIST”, Proceedings of XLVIII International Scientific Conference on Information, Communication and Energy Systems and Technologies ICEST 2013, 26-29 June 2013, Ohrid, Macedonia, Vol 1, pp. 199-202, ISBN 978-9989-786-90-7, Faculty of Technical Sciences, Bitola
Goran Nikolić, Tatjana Nikolić, Branislav Petrović and Mile Stojčev, “Optimization of DC/AC inverter driving”, Proceedings of XLVIII International Scientific Conference on Information, Communication and Energy Systems and Technologies ICEST 2013, 26-29 June 2013, Ohrid, Macedonia, Vol 1, pp. 231-234, ISBN 978-9989-786-90-7, Faculty of Technical Sciences, Bitola